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apr 30, 2003 revised to nov 20, 2006 page 1 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut the q48t15050 through-hole mounted dc-dc converter offers unprecedented performan ce in the industry-standard quarter brick format. this is accomplished through the use of patent pending circuit and packaging techniques to achieve ultra-high efficiency, excellent thermal performance and a very low body profile. in telecommunications applications the q & & family 15 a con- verters provide thermal performance comparable with exist- ing 20 a designs. low body profile and the preclusion of heat sinks minimize airflow shadowing, thus enhancing cool- ing for downstream devices. the use of 100% surface-mount technologies for assembly, coupled with power-one?s ad- vanced electric and thermal circuitry and packaging, results in a product with extremely high quality and reliability. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 5 10 15 20 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 1: available load current vs. ambient air temperature and air- flow rates for q48t15050 converter mounted vertically with air flow- ing from pin 3 to pin 1, mosfet temperature 120 c, vin = 54 v. applications ? telecommunications ? data communications ? wireless ? servers q48t15050 converter features ? rohs lead-free solder and lead-solder-exempted products are available ? delivers up to 15 a ? high efficiency: 88% @ 15 a, 87.5% @ 7.5 a ? start-up into pre-biased output ? no minimum load required ? no heat sink required ? low profile: 0.28? [7.2 mm] ? low weight: 1 oz [28 g] typical ? industry-standard footprint: 1.45? x 2.30? ? industry-standard pinout ? meets basic insulation requirements of en60950 ? withstands 100 v input transient for 100 ms ? on-board lc input filter ? fixed-frequency operation ? fully protected ? remote output sense ? output voltage trim range: +10%/-20% ? trim resistor via industry-standard equations ? high reliability: mtbf 2.6 million hours, calculated per telcordia tr-332, method i case 1 ? positive or negative logic on/off option ? ul 60950 recognized in u.s. & canada, and demko certified per iec/en 60950 ? meets conducted emissi ons requirements of fcc class b and en55022 class b with external filter ? all materials meet ul94, v-0 flammability rating
apr 30, 2003 revised to nov 20, 2006 page 2 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut electrical specifications conditions: t a =25oc, airflow=300 lfm (1.5 m/s), vin= 48 vdc, unless otherwise specified. parameter notes min typ max units absolute maximum ratings input voltage continuous 0 80 vdc operating ambient temperature -40 85 c storage temperature -55 125 c input characteristics operating input voltage range 36 48 75 vdc input under voltage lockout non-latching turn-on threshold 33 34 35 vdc turn-off threshold 31 32 33 vdc input transient withstand (susceptibility) 100 ms 100 vdc output characteristics external load capacitance plus full load (resistive) 10,000 f output current range 0 15 adc current limit inception non-latching 16.5 18 20 adc peak short-circuit current non-latching. short=10m ? . 30 40 a rms short-circuit current non-latching 5.3 arms isolation characteristics i/o isolation 2000 vdc isolation capacitance 230 f isolation resistance 10 m ? feature characteristics switching frequency 435 khz output voltage trim range 1 use trim equations on page 6 -20 +10 % remote sense compensation 1 percent of v out ( nom ) +10 % output over-voltage protection non-latching 117 122 127 % over-temperature shutdown (pcb) non-latching 118 c auto-restart period applies to all protection features 100 ms turn-on time 2.5 ms on/off control (positive logic) converter off -20 0.8 vdc converter on 2.4 20 vdc on/off control (negative logic) converter off 2.4 20 vdc converter on -20 0.8 vdc additional notes: 1. vout can be increased up to 10% via the sense leads or up to 10% via the trim function, however total output voltage trim fr om all sources should not exceed 10% of v out ( nom ), in order to insure specified operation of over-volt age protection circuitry. see further discussion at end of output voltage adjust /trim section.
apr 30, 2003 revised to nov 20, 2006 page 3 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut electrical specifications (continued) conditions: t a =25oc, airflow=300 lfm (1.5 m/s), vin= 48 vdc, unless otherwise specified. parameter notes min typ max units input characteristics maximum input current 15 adc, 5.0 vdc out @ 36 vdc in 2.4 adc input stand-by current vin = 48 v, converter disabled 3.8 madc input no load current (0 load on the output) vin = 48 v, converter enabled 70 madc input reflected-ripple current see figure 25 - 25mhz bandwidth 6 ma pk-pk input voltage ripple rejection 120hz tbd db output characteristics output voltage set point (no load) -40oc to 85oc 4.950 5.000 5.050 vdc output regulation over line 2 5 mv over load 2 5 mv output voltage range over line, load and temperature 4.925 5.075 vdc output ripple and noise - 25mhz bandwidth full load + 10 f tantalum + 1 f ceramic 30 50 mv pk-pk dynamic response load change 25% of iout max, di/dt = 0.1 a/s co = 1 f ceramic (fig.20) 120 mv di/dt = 5 a/s co = 450 f tant. + 1 f ceramic (fig.21) 100 mv setting time to 1% 100 s efficiency 100% load 88 % 50% load 87.5 %
apr 30, 2003 revised to nov 20, 2006 page 4 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut physical information top view 1 2 3 7 8 6 5 4 side view converter part numbering scheme product series input voltage mounting scheme rated load current output voltage on/off logic maximum height (ht) pin length (pl) special features q 48 t 15 050 - n b a 0 quarter-brick format 36-75 v through- hole 15 adc 050 ? 5.0 v n ? negative p ? positive a ? 0.303? b ? 0.336? c ? 0.500? d ? 0.400? a ? 0.188? b ? 0.145? c ? 0.110? 0 ? std the example above describes p/n q48t15050-nba0: 36-75 v input, th rough-hole mounting, 15 a @ 5.0 v output, negative on/off logi c, a maximum height of 0.336?, and a through the board pin length of 0.1 88?. please consult factory regar ding availability of a spec ific version. rohs ordering information: ? no rohs suffix character is required for lead-solder-exemption compliance. ? for rohs compliance to all six s ubstances, add the letter "g" as the last letter of the part number. ht (maximum height) cl (minimum clearance) pl (pin length) height option +0.000 [+0.00] -0.038 [-0.97] +0.016 [+0.41] -0.000 [-0.00] pin option 0.005 [0.13] a 0.303 [7.69] 0.030 [0.77] a 0.188 [4.77] b 0.336 [8.53] 0.063 [1.60] b 0.145 [3.68] c 0.500 [12.70] 0.227 [5.77] c 0.110 [2.79] d 0.400 [10.16] 0.127 [3.23] pin connections pin # function 1 vin (+) 2 on/off 3 vin (-) 4 vout (-) 5 sense(-) 6 trim 7 sense(+) 8 vout (+) ? ? pins 1-3 and 5-7 are ? 0.040? [1.02] with ? 0.078? [1.98] shoulder ? pins 4 and 8 are ? 0.062? [1.57] without shoulder ? pin material: brass ? pin finish: tin/lead over nickel ? converter weight: 1 oz [28 g] typical
apr 30, 2003 revised to nov 20, 2006 page 5 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut operation input and output impedance these power converters have been designed to be stable with no external capacitors when used in low inductance in- put and output circuits. however, in many applications , the inductance associated with the distribution from the pow er source to the input of the converter can affect the stabilit y of the converter. the addi- tion of a 33 f electrolytic capacitor with an esr < 1 ? across the input helps ensure st ability of the converter. in many applications, the user has to use decoupling capaci- tance at the load. the power converter will exhibit stable op- eration with external load capacitance up to 10,000 f. on/off (pin 2) the on/off pin is used to turn the power converter on or off remotely via a system signal. there are two remote con- trol options available, positive logic and negative logic and both are referenced to vin(-). typical connections are shown in fig. 2. rload vin control input vin (+) vin (-) on/off vout (+) vout (-) trim sense (+) sense (-) (top view) converter q tm family fig. 2: circuit configuration for on/off function. the positive logic version turns on when the on/off pin is at logic high and turns off when at logic low. the converter is on when the on/off pin is left open . the negative logic version turns on when the pin is at logic low and turns off when the pin is at logic high. the on/off pin can be hard wired directly to vin(-) to enable automatic power up of the converter without the need of an external control signal. on/off pin is internally pulled-up to 5 v through a resistor. a mechanical switch, open collector transistor, or fet can be used to drive the input of the on/off pin. the device must be capable of sinking up to 0.2 ma at a low level volt- age of 0.8 v. an external voltage source of 20 v max. may be connected directly to the on/off input, in which case it should be capable of sourcing or sinking up to 1 ma depending on the signal polarity. see the start-up informa- tion section for system timing waveforms associated with use of the on/off pin. remote sense (pins 5 and 7) the remote sense feature of the converter compensates for voltage drops occurring between the output pins of the con- verter and the load. the sense(-) (pin 5) and sense(+) (pin 7) pins should be connecte d at the load or at the point where regulation is required (see fig. 3). 100 10 rw rw rload vin vin (+) vin (-) on/off vout (+) vout (-) trim sense (+) sense (-) (top view) converter q tm family fig. 3: remote sense circuit configuration. if remote sensing is not required, the sense(-) pin must be connected to the vout(-) pin (pin 4), and the sense(+) pin must be connected to the vout(+) pin (pin 8) to ensure the converter will regulate at t he specified output voltage. if these connections are not made, the converter will deliver an output voltage that is slightly higher than the specified value. because the sense leads carry minimal current, large traces on the end-user board are not required. however, sense traces should be located close to a ground plane to minimize system noise and insure optimum performance. when wiring discretely, twisted pair wires should be used to connect the sense lines to the load to reduce susceptibility to noise. the converter?s output over-vol tage protection (ovp) senses the voltage across vout(+) and vout(-), and not across the sense lines, so the resistance (and resulting voltage drop) between the output pins of the converter and the load should be minimized to prevent unwanted triggering of the ovp. when utilizing the remote sense feature, care must be taken not to exceed the maximum allowable output power capabil- ity of the converter, equal to the product of the nominal out- put voltage and the allowable ou tput current for the given conditions.
apr 30, 2003 revised to nov 20, 2006 page 6 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut when using remote sense, the output voltage at the con- verter can be increased by as much as 10% above the nominal rating in order to maintain the required voltage across the load. therefore, the designer must, if necessary, decrease the maximum current (originally obtained from the derating curves) by the same percentage to ensure the con- verter?s actual output power remains at or below the maxi- mum allowable output power. output voltage adjust /trim (pin 6) the converter?s output voltage can be adjusted up 10% or down 20% relative to the rated output voltage by the addition of an externally connected resistor. the trim pin should be left open if trimming is not being used. to minimize noise pickup, a 0.1 f capacitor is con- nected internally between the trim and sense(-) pins. to increase the output voltage, refer to fig. 4. a trim resistor, r t-incr , should be connected between the trim (pin 6) and sense(+) (pin 7), with a value of: 10.22 1.225 ? 626 ? )v 5.11(100 r nom o incr t ? ? + = ? ? [k ? ] where, = ? incr t r required value of trim-up resistor k ? ] = ? nom o v nominal value of output voltage [v] 100 x v ) v (v ? nom - o nom - o req - o ? = [%] = ? req o v desired (trimmed) output voltage [v]. when trimming up, care must be taken not to exceed the converter?s maximum allowable output power. see previous section for a complete discussion of this requirement. to decrease the output voltage (fig. 5), a trim resistor, r t-decr , should be connected between the trim (pin 6) and sense(-) (pin 5), with a value of: 10.22 ? 511 r decr t ? = ? [k ? ] where, rload vin vin (+) vin (-) on/off vout (+) vout (-) trim sense (+) sense (-) r t-incr (top view) converter q tm family fig. 4: configuration for increasing output voltage . = ? decr t r required value of trim-down resistor [k ? ] and ? converter q tm family fig. 5: configuration for decreasing output voltage. trimming/sensing beyond 110% of the rated output voltage is not an acceptable design practice, as this condition could cause unwanted triggering of the output over-voltage protec- tion (ovp) circuit. the designer should ensure that the dif- ference between the voltages ac ross the converter?s output pins and its sense pins does not exceed 0.50 v, or: 0.50 )] ( v ) ( [v )] ( v ) ( [v sense sense out out ? ? + ? ? ? + [v] this equation is applicable for any condition of output sens- ing and/or output trim.
apr 30, 2003 revised to nov 20, 2006 page 7 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut protection features input undervoltage lockout input undervoltage lockout is standard with this converter. the converter will shut down when the input voltage drops below a pre-determined voltage. the input voltage must be at least 35 v for the converter to turn on. once the converter has been turned on, it will shut off when the input voltage drops below 31 v. this feature is beneficial in preventing deep discharging of batteries used in telecom applications. output overcurrent protection (ocp) the converter is protected agains t over-current or short cir- cuit conditions. upon sensing an overcurrent condition, the converter will switch to cons tant current operation and thereby begin to reduce output voltage. when the output voltage drops below 2.5 vdc, the converter will shut down (fig. 26). once the converter ha s shut down, it will attempt to restart nominally every 100 ms with a 1% duty cycle (fig 27). the attempted restart will continue indefinitely until the overload or short circuit conditions are removed or the output voltage rises above 2.5 vdc. output overvoltag e protection (ovp) the converter will shut down if the output voltage across vout(+) (pin 8) and vout(-) (pin 4) exceeds the threshold of the ovp circuitry. the ovp circuitry contains its own refer- ence, independent of the output voltage regulation loop. once the converter ha s shut down, it will attempt to restart every 100 ms until the ovp condition is removed. overtemperature protection (otp) the converter will shut down under an overte mperature con- dition to protect itself from overheating caused by operation outside the thermal derating curves, or operation in abnor- mal conditions such as system fan failure. after the con- verter has cooled to a safe operating temperature, it will automatically restart. safety requirements the converters meet north american and international safety regulatory requirements per ul60950 and en60950. basic insulation is provided between input and output. to comply with safety agencies requirements, an input line fuse must be used external to the converter. a 4-a fuse is recommended for use with this product. electromagnetic compatibility (emc) emc requirements must be met at the end-product system level, as no specific standards dedicated to emc character- istics of board mounted component dc-dc converters exist. however, power-one tests its converters to several system level standards, primary of which is the more stringent en55022, information technology equipment - radio distur- bance characteristics - limits and methods of measurement. with the addition of a simple external filter (see application notes), all versions of the q48t15 converters pass the re- quirements of class b conducted emissions per en55022 and fcc, and meet at a minimu m, class a radiated emis- sions per en 55022 and class b per fcc title 47cfr, part 15-j. please contact power-one applications engineering for details of this testing. input transient withstand this family of converters meet s the input transient withstand requirements of bellcore gr-513 (section 13, table 4.2) as shown in fig. 6, and also withst ands 100 v input transient for 100 ms. transient duration vdc 5 seconds -65 10 ms -75 10 s -100 1 s -200 fig. 6: input transient withstand capability per bellcore gr-513. (negative signs imply telecom transients relative to vin(+) terminal)
apr 30, 2003 revised to nov 20, 2006 page 8 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut characterization general information the converter has been characterized for many operational aspects, to include thermal derating (maximum load current as a function of ambient temperature and airflow) for vertical and horizontal mounting, effici ency, start-up and shutdown parameters, output ripple and no ise, transient response to load step-change, overload and short circuit. the following pages contain specific plots or waveforms as- sociated with the converter. a dditional comments for specific data are provided below. test conditions all data presented were taken with the converter soldered to a test board, specifically a 0. 060? thick printed wiring board (pwb) with four layers. the top and bottom layers were not metalized. the two inner layers, comprising two-ounce cop- per, were used to provide traces for connectivity to the con- verter. the lack of metalization on the outer layers as well as the limited thermal connection ensured that heat transfer from the converter to the pwb was minimized. this provides a worst-case but consistent scenario for thermal derating pur- poses. all measurements requiring airflow were made in power- one?s vertical and horizontal wind tunnel facilities using in- frared (ir) thermography and thermocouples for thermome- try. ensuring components on the converter do not exceed their ratings is important to maintaining high reliability. if one an- ticipates operating the converter at or close to the maximum loads specified in the derating curves, it is prudent to check actual operating temperatures in the application. thermo- graphic imaging is preferable; if this capability is not avail- able, then thermocouples may be used. power-one recom- mends the use of awg #40 gauge thermocouples to ensure measurement accuracy. careful routing of the thermocouple leads will further minimize meas urement error. refer to fig- ure 28 for optimum measuring thermocouple location. thermal derating load current vs. ambient temperature and airflow rates are given in figs. 10-13. ambient temperature was varied be- tween 25c and 85c, with airflow rates from 30 to 500 lfm (0.15 to 2.5 m/s), and vertical and horizontal converter mounting. for each set of conditions, the maximum load current was defined as the lowest of: (i) the output current at which either any fet junction tem- perature did not exceed a maximum specified temperature (either 105c or 120c) as i ndicated by the thermographic image, or (ii) the nominal rating of the converter (15 a) during normal operation, derati ng curves with maximum fet temperature less than or equal to 120c should not be ex- ceeded. temperature on the pcb at the thermocouple loca- tion shown in fig. 28 should not exceed 118c in order to operate inside the derating curves. efficiency efficiency vs. load current plots are shown in figs. 14 and 16 for ambient temperature of 25oc, airflow rate of 300 lfm (1.5 m/s), both vertical and horizontal orientations, and input voltages of 36 v, 54 v and 72 v. also, plots of efficiency vs. load current, as a function of ambient temperature with vin = 54 v, airflow rate of 200 lfm (1 m/s) are shown for both a vertically and horizontally mounted converter in figs. 15 and 17, respectively. start-up output voltage waveforms, during the turn-on transient using the on/off pin for full rated load currents (resistive load) are shown without and with 10,000 f load capacitance in figs. 18 and 19, respectively. ripple and noise figure 22 shows the output voltage ripple waveform, meas- ured at full rated load current with a 10 f tantalum and 1 f ceramic capacitor across the output. note that all output voltage waveforms are measured across a 1 f ceramic ca- pacitor. the input reflected ripple current waveforms are obtained using the test setup shown in fig 23. the corresponding waveforms are shown in figs. 24 and 25.
apr 30, 2003 revised to nov 20, 2006 page 9 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut start-up information (using negative on/off) scenario #1: initial start-up from bulk supply on/off function enabled, converte r started via application of v in . see figure 7. time comments t 0 on/off pin is on; system front end power is toggled on, v in to converter begins to rise. t 1 v in crosses under-voltage lockout protection circuit threshold; converter enabled. t 2 converter begins to respond to turn-on command (con- verter turn-on delay). t 3 converter v out reaches 100% of nominal value. for this example, the total converter start-up time (t 3 - t 1 ) is typically 2.5 ms. scenario #2: initial start-up using on/off pin with v in previously powered, converter started via on/off pin. see figure 8. time comments t 0 v input at nominal value. t 1 arbitrary time when on/off pin is enabled (converter enabled). t 2 end of converter turn-on delay. t 3 converter v out reaches 100% of nominal value. for this example, the total converter start-up time (t 3 - t 1 ) is typically 2.5 ms. scenario #3: turn-off and restart using on/off pin with v in previously powered, converter is disabled and then en- abled via on/off pin. see figure 9. time comments t 0 v in and v out are at nominal values; on/off pin on. t 1 on/off pin arbitrarily disabled; converter output falls to zero; turn-on inhibit delay period (100 ms typical) is initiated, and on/off pin action is internally inhibited. t 2 on/off pin is externally re-enabled. if (t 2 - t 1 ) 100 ms , external action of on/off pin is locked out by start-up inhibit timer. if (t 2 - t 1 ) > 100 ms , on/off pin action is internally enabled. t 3 turn-on inhibit delay period ends. if on/off pin is on, converter begins turn-on; if off, converter awaits on/off pin on signal; see figure 8. t 4 end of converter turn-on delay. t 5 converter v out reaches 100% of nominal value. for the condition, (t 2 - t 1 ) 100 ms , the total converter start-up time (t 5 - t 2 ) is typically 102.5 ms. for (t 2 - t 1 ) > 100 ms , start-up will be typically 2.5 ms after release of on/off pin. fig. 7: start-up scenario #1. on/off state v out t 0 t 1 t 2 t 3 on off v in t fig. 8: start-up scenario #2. on/off state off on v out t 0 t 2 t 1 t 5 v in t t 4 t 3 100 ms fig. 9: start-up scenario #3. v in on/off state v out t t 0 t 1 t 2 t 3 on off
apr 30, 2003 revised to nov 20, 2006 page 10 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 5 10 15 20 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 10: available load current vs. ambient air temperature and airflow rates for converter mounted vertically with vin = 54 v, air flowing from pin 3 to pin 1 and maximum fet temperature 120 c. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 5 10 15 20 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 12: available load current vs. ambient temperature and airflow rates for converter mounted horizontally with vin = 54 v, air flowing from pin 3 to pin 4 and maximum fet tempera- ture 120 c. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 5 10 15 20 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 11: available load current vs. ambient air temperature and airflow rates for converter mounted vertically with vin = 54 v, air flowing from pin 3 to pin 1 and maximum fet temperature 105 c. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 5 10 15 20 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 13: available load current vs. ambient temperature and airflow rates for converter mounted horizontally with vin = 54 v, air flowing from pin 3 to pin 4 and maximum fet tempera- ture 105 c.
apr 30, 2003 revised to nov 20, 2006 page 11 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut load current [adc] 0 2 4 6 8 10 12 14 16 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 72 v 54 v 36 v fig. 14: efficiency vs. load current and input voltage for con- verter mounted vertically with air flowing from pin 3 to pin 1 at a rate of 300 lfm (1.5 m/s) and ta = 25 c. load current [adc] 0 2 4 6 8 10 12 14 16 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 72 v 54 v 36 v fig. 16: efficiency vs. load current and input voltage for con- verter mounted horizontally with air flowing from pin 3 to pin 4 at a rate of 300 lfm (1.5 m/s) and ta = 25 c. load current [adc] 0246810121416 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 70 c 55 c 40 c fig. 15: efficiency vs. load current and ambient temperature for converter mounted vertically with vin = 54 v and air flowing from pin 3 to pin 1 at a rate of 200 lfm (1.0 m/s). load current [adc] 0246810121416 efficiency 0.65 0.70 0.75 0.80 0.85 0.90 0.95 70 c 55 c 40 c fig. 17: efficiency vs. load current and ambient temperature for converter mounted horizontally with vin = 54 v and air flow- ing from pin 3 to pin 4 at a rate of 200 lfm (1.0 m/s).
apr 30, 2003 revised to nov 20, 2006 page 12 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut fig. 18: turn-on transient at full rated load current (resistive) with no output capacitor at vin = 48 v, triggered via on/off pin. top trace: on/off signal (5 v/div.). bottom trace: output voltage (2 v/div.) time scale: 1 ms/div. fig. 20: output voltage response to load current step-change (3.75 a ? 7.5 a ? 3.75 a) at vin = 48 v. top trace: output volt- age (100 mv/div). bottom trace: l oad current (5 a/div.). current slew rate: 0.1 a/ s. co = 1 f ceramic. time scale: 0.2 ms/div. fig. 19: turn-on transient at full rated load current (resistive) plus 10,000 f at vin = 48 v, triggered via on/off pin. top trace: on/off signal (5 v/div.). bottom trace: output voltage (2 v/div.). time scale: 2 ms/div. fig. 21: output voltage response to load current step-change (3.75 a ? 7.5 a ? 3.75 a) at vin = 48 v. top trace: output volt- age (100 mv/div.). bottom trace: load current (5 a/div). current slew rate: 5 a/ s. co = 450 f tantalum + 1 f ceramic. time scale: 0.2 ms/div.
apr 30, 2003 revised to nov 20, 2006 page 13 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut fig. 22: output voltage ripple (20 mv /div.) at full rated load current into a resistive load with co = 10 f tantalum + 1uf ce- ramic and vin = 48 v. time scale: 1 s/div. fig. 24: input reflected ripple current, i c (100 ma/div), meas- ured at input terminals at full rated load current and vin = 48 v. refer to fig. 23 for test setup. time scale: 1 s/div. vout v source i s i c 1 f ceramic capacitor 10 h source inductance dc/dc converter 33 f esr <1 electrolytic capacitor ? q tm family fig. 23: test setup for measuring input reflected ripple cur- rents, i c and i s . fig. 25: input reflected ripple current, i s (10 ma/div), measured through 10 h at the source at full ra ted load current and vin = 48 v. refer to fig. 23 for te st setup. time scale: 1 s/div.
apr 30, 2003 revised to nov 20, 2006 page 14 of 14 www.power-one.com q48t15050 dc-dc converter data sheet 3 6 -75 vdc in p ut; 5 vdc @ 15a o u t p ut 10 20 4.0 6.0 2.0 iout [adc] vout [vdc] 0 0 15 5 5.0 1.0 3.0 fig. 26: output voltage vs. load current showing current limit point and converter shutdown poi nt. input voltage has almost no effect on current limit characteristic. fig. 27: load current (top trace, 20 a/di v, 20 ms/div) into a 10 m ? short circuit during restart, at vin = 48 v. bottom trace (20 a/div, 1 ms/div) is an expansi on of the on-time portion of the top trace. fig. 28: location of the thermocouple for thermal testing. nuclear and medical applications - power-one products are not designed, intended for use in, or authorized for use as component s in life support systems, equipment used in hazardous environments, or nuclear c ontrol systems without the express written consent of the respec tive divisional president of power-one, inc. technical revisions - the appearance of products, including safe ty agency certifications pictured on labels, may change dependi ng on the date manufactured. specifications ar e subject to change without notice.

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